ARCHITECTURE OF A CONVOLUTIONAL NEURAL NETWORK WITH THE EXTRACTION OF SIGNS IN THE RESIDUAL CLASS SYSTEM

UDC 004.855.5

Authors

N.I. Chervyakov, Doctor of Technical Sciences, Head of the Department of Applied Mathematics and Mathematical Modeling,
P.A. Lyakhov, candidate of physical and mathematical sciences, associate professor of the Department of Applied Mathematics and Mathematical Modeling,
M.V. Valueva, graduate student of the Department of Applied Mathematics and Mathematical Modeling,
N.N. Nagornov, graduate student of the Department of Applied Mathematics and Mathematical Modeling,
G.V. Valuev, undergraduate of the Department of Applied Informatics

Abstract

The paper proposes a new architecture of a convolutional neural network (SNA), in which all layers responsible for feature extraction are implemented in hardware on FPGAs using a residual class system (RNC) to increase performance. Thus, the proposed architecture of the SNA is divided into hardware and software. Hardware simulation using Kintex7 xc7k70tfbg676-2 FPGA showed that the use of RNS in the convolutional layer of a neural network can reduce resource consumption by 13,34% compared to the traditional number system. Software modeling was performed in the Matlab 2017b environment. Comparison of the hardware-software implementation with the software implementation showed that the use of hardware-software architecture reduces the average image recognition time by 62,66%.

Keywords

image processing, convolutional neural networks, residual class system, FPGA.